Speed Optimization of Image Processing Application using FPGA Based Multi-Processor System on Chip

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Indrayani Patle
Pankaj B Thote
Abhishek Junghare
Chandrakant Rathore
Christie Anil Joseph

Abstract

Speed optimized embedded devices with low power consumption are demand of today's world. Now a day's, these devices are used in complex application such as cryptographic algorithm, digital signal processing, image processing etc. Multiprocessor based systems are faster as compared with single processor based systems because it performs multiple tasks in parallel fashion. Hence, Field Programmable Gate Array (FPGA) based Multi-Processor System on Chip (MPSoC) can be an efficient option for speed optimization. his paper presents work on speed optimization of image processing application in hardware setting using efficient and fast FPGA based MPSoC. The multiprocessor environment was developed using MicroBlaze soft-core processor with Xilix sparten-3e starter board. Edge detection being fundamental need of image processing, hence SOBEL edge detection algorithm was implemented on single processor based environment as well as on developed MPSoC. To estimate the actual time of processing, software profiling was done which showed FPGA based MPSoC reduces overhead on master processor 8 hence improvement in computational speed was observed as compared to single processor environment.

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How to Cite
1.
Patle I, Thote P, Junghare A, Rathore C, Joseph C. Speed Optimization of Image Processing Application using FPGA Based Multi-Processor System on Chip. sms [Internet]. 31Dec.2021 [cited 8Aug.2025];13(SUP 2):146-52. Available from: https://smsjournals.com/index.php/SAMRIDDHI/article/view/2575
Section
Research Article